This invention relates to hotsocket compatible circuits, and more particularly, to hotsocket-compatible transistor body bias circuits for integrated circuits.
The performance of modern integrated circuits is often limited by power consumption considerations. Circuits with poor power efficiency place undesirable demands on system designers. Power supply capacity may need to be increased, thermal management issues may need to be addressed, and circuit designs may need to be altered to accommodate inefficient circuitry.
Integrated circuits often use complementary metal-oxide-semiconductor (CMOS) transistor technology. CMOS integrated circuits have n-channel metal-oxide-semiconductor (NMOS) and p-channel metal-oxide-semiconductor (PMOS) transistors.
NMOS and PMOS integrated circuits have four terminals—a drain, a source, a gate, and a body. The body terminal, which is sometimes referred to as the well or bulk terminal, can be biased to reduce power consumption. For example, a positive bias voltage can be applied to the body of a PMOS transistor and a negative bias voltage can be applied to the body of an NMOS transistor. These bias voltages can increase the effective threshold voltages of the transistors and thereby reduce their leakage currents. Reductions in leakage current reduce power consumption.
Body bias voltages may be supplied from an external source. When an integrated circuit is operating normally in a system, an externally supplied body bias voltage may be applied to a transistor body bias terminal to reduce leakage current. However, during power-up operations, situations may arise in which the externally supplied body bias voltage is not valid, even though other power supply voltages are valid. This type of situation, which is sometimes referred to as a hotsocket condition, may lead to undesirably large transistor currents, because the current reducing effects of the body bias voltage are not available in the absence of the external body bias voltage. Collectively, these transistor currents can create undesirable current surges and large power losses during power up.
It would therefore be desirable to provide transistor body bias voltage circuitry capable of reducing power consumption on integrated circuits during hotsocket conditions.